ENGINEERING DIRECTOR
Experience Leading, Architecting, Delivering Projects to Successful Completion
u Experienced in all phases of complex product development including architecture, design, design verification, implementation, product validation and product support.
u Hands on, process oriented team leader with ability to support and mentor solutions. Able to clearly communicate and present across corporate organizations and lead multi-location teams. Thorough understanding of hardware, software, test and operation engineering functions.
u Deep knowledge of carrier Ethernet, SONET/SDH, T1/E1/DS3, processors and processor interfaces, system architecture, and FPGA design.
u Excel in creative solutions to complex product design challenges. A process oriented engineer with real world experience in delivering quality products on time.
EXPERTISE
Tools:
Altera Quartus and Qsys, Xilinx ISE, Model-Sim, Aldec Riviera Simulator, Verilog, System Verilog, VHDL, UVM, Perl, Subversion, RCS, Framemaker, MS Project, Windows and Linux
Engineering:
Management: Product definition and early phase analysis, documentation, device specification, vendor negotiation, front end design, verification planning, implementation, product verification, and support
Process development and establishment, Agile Development Methodology, project budgeting, recruiting, team building/motivation, project tracking, problem resolution, personnel reviews, cross functional coordination, sales and marketing interface
EXPERIENCE
OVERTURE NETWORKS (Richardson, TX and Morrisville, NC)
Director of FPGA Engineering, 1/2010 to Present
(Ceterus Networks acquired by Overture)
Successfully architected, managed, and directly contributed to the FPGA designs for the 1400, 4800, and 8500 carrier Ethernet products. These products have been deployed in tier 1 carrier networks to provide enterprise Ethernet transport and cell site backhaul services. Grew FPGA team from 4 to 11 engineers.
Recently completed projects:
Overture 4800
Working closely with sales, marketing, hardware, and software, developed product architecture for 10 GbE/GbE Ethernet demarcation system. Delivered 2 FPGA designs supporting 10 and 1 GbE Ethernet MACs, RMON, traffic classification, policing, layer 2 switching, hierarchical shaping, class of service queuing, G.8032 ring support, and full service OAM functionality for continuity and performance assurance with PCIe control plane interface and interfaces to external DDR2, QDR and RLDRAM. Designed, coded, and verified service OAM FPGA modules. Coordinated Morrisville verification team in verification environment and directed test case creation. Recruited new team members and organized design and implementation. Product is in early deployment phase.
Overture 1400
Working with Morrisville hardware and software teams created product functional architecture and delivered all FPGAs. Implemented and delivered 7 different FPGAs supporting 1 GbE Ethernet MAC, RMON, traffic classification, policing, hierarchical shaping, class of service queuing, and full service OAM implemented in FPGA logic. DS1/E1/DS3/E3/OC3/OC12 VC/LCAS/GFP and X.86 implemented in FPGA logic. SONET/SDH section/line/path functions and APS implemented in FPGA logic. Hands on functions included early design analysis, pin placement, and design specification. Product is in wide deployment in tier 1 networks.
Overture 8500
Architected and managed FPGA development for multi-slot with system redundancy, Ethernet pseudo wire aggregation platform. All control and datapath functionality implemented in FPGA logic. Product functioned as an IEEE-1588 grandmaster and terminated/originated 1008 T1 over Ethernet pseudo wires. Directly responsible for T1 pseudo wire adaptation design, verification and implementation. Product is deployed in tier 2 networks.
CETERUS NETWORKS (Richardson...
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