RESUME OF QUALIFICATIONS
Principal Software Engineer
Computer Software, Embedded Real-time Software, ASIC Verification, Cyber Security Systems
ACTIVE SECRET CLEARANCE / Permanent and Contract Engineering
EDUCATION AND CREDENTIALS
BSEE, Bachelor of Science Degree in Electrical Engineering; University of New Mexico
CISSP, Certified Information Systems Security Professional (2006-2012), IT network security, trained in ISSEP (ISC)2
Patents, (two) in cryptography: http://www.patentbuddy.com/Inventor/Sutherland-Bryce/12174083
SUMMARY OF QUALIFICATIONS
Computer Software: Linux/UNIX/RHEL C/C++, GCC tool-chain, Python, OOP, UML, STL, SDLC CMMI, Agile, Rhapsody, Rose, Linux IPC, threading, sockets, TCP/IP, network security protocols, PKCS/RFC programming, cryptography, UI/UX
Embedded: C/C++, Ada95, ASM, RTOS, PowerPC, ARM, ST Micro, x86, MSP430 (TI), XScale, GHS INTEGRITY, DO-178B, VxWorks, Embedded RH Linux cross-compilers, ARM toolset, Keil, Eclipse, CodeComposer Studio (TI)
ASIC/FPGA: Verilog design and test benches, SystemVerilog, SystemC TLM, OVM,VMM, VCS, Questa, DPI, functional coverage, components, pattern-based transactions, scoreboard, monitors; FPGA prototyping, Linux scripting environment.
PROFESSIONAL EXPERIENCE
10/2013 -2/2014: Draper Laboratory at M.I.T., Cambridge MA (Cryptographic Software Engineer - short term contract)
Accomplished: Designed and code of embedded cryptographic software in C with Lincoln Labs for NSA Type-2 for UAV program.
Keil Win32 development for embedded STM SoC; integration and test, NSA FPGA drivers, SPI, USART, GPIO, Agile env.
4/2012– 4/2013: Raytheon Corporation, Tucson AZ (Computer Software Engineer - under contract)
Accomplished: Designed and coded GCC tool chain, Linux RHEL hardware-in-the-loop (SM3 missile) networking and applications written in C++ using STL for remote lab equipment: Spirent GPS P(Y) simulation, guidance system, anti-spoofing, and laboratory real-time control messaging network drivers w/PCIe cards; protocols: RS-422/232 serial, UDP/TCP, CAN, MIl-1553. Agile SCRUM.
4/2011– 4/2012: Intel Corporation, Chandler AZ (ASIC Verification Engineer - permanent)
Accomplished: Designed and coded a SystemVerilog OVM transaction based model to simulate a nano-cryptographic processing fabric. OVM phased transactions, C-DPI from SystemVerilog to SystemC/TLM, Linux IPC: threads, events, semaphores, sockets.
Used Linux GCC tool chain and C++ templates, built OVM components: monitors, bridges, adaptors, scoreboard. Agile SCRUM.
10/1999 – 4/2011 General Dynamics C4S, Scottsdale AZ (Cryptographic Software and ASIC/FPGA Engineer - permanent)
Accomplished: Designed and coded a cryptographic software library used in high speed network encryptors and storage products.
Prototyping and testing done in Python ported to real-time C/C++ under Rhapsody, GHS INTEGRITY for ARM and CodeComposer Studio (TI) for MSP430 target. Included both NSA and NIST/FIPS commercial cryptography for: IPSec, HAIPE, RSA, ECDSA, AES, SSL, ECDH, Suite A and B. Secure network penetration analysis w/Mitre, NSA Network Waveform Engr. for AMF radios, including full SDLC and CMMI level-5 process, TOC NSA documentation for multiple waveforms: Link-16, WNW, SWR, and Satcom.
ASIC Verification Engineer Accomplishments: co-developer of NSA certified ASICs, cryptographic devices using Verilog RTL for the Advanced INFOSEC Machine II (AIM II) use of SystemVerilog behavioral models for SystemVerilog test benching accomplished to correct and enhance existing designs. Developed and verified AIM-II high speed coprocessor ...
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