SENIOR STAFF ENGINEER
SUMMARY OF QUALIFICATIONS
Staff Process Engineer with 15+ years of CMOS thin film technology development, scale up, and transfer to High Volume semiconductor manufacturing, yield and defect improvements, LEAN and High Precision Manufacturing experience. Systematic problem solver with proven extensive record of R&D innovation including 30+ papers and 50+ Intel white papers, 5 US Patents. Experienced in partnering with diverse teams, international OEMs to achieve world class results based on data analysis. Specialties include thin films, process integration, and yield and productivity enhancements.
Demonstrated achievements in:
Thin Films
Design of Experiments
Cross-functional teams
Engineering data analysis
LEAN
R&D
Failure Analysis
Process Integration
Problem solving
Microfabrication
SPC
Characterization
PROFESSIONAL EXPERIENCE
INTEL CORPORATION, Hudson, MA
Staff Thin Film Process/Yield Engineer (2000 – present)
• Managed HVM process including sustaining, equipment, lean manufacturing, continuous improvement, and new process development. Cross-Factory and Cross-Functional team leader.
• On rotation to yield group owned yield analysis and dispositioning of discrepant material. Reviewed problem solving from each non-standard event with area owners to ensure proper documentation and drove corrective/preventative actions.
Key achievements
• Streamlined dispositioning response flow chart for end-of-line product failures that assured proper device parameter review resulting in 20 hrs. of weekly savings and drastic reduction of on hold time.
Staff MEMs Process Technology Development Engineer, New Products Group (2011 - 2014)
• Led cross functional team through specification, procurement, process qualification, operator training and certification of new-to-Intel sputter cluster tool from the European OEM to produce first-of-a-kind CMOS integrated inductor MEMS magnetic device.
Key achievements
• Applied structured problem solving while working with international vendor to reengineer the DC Physical Vapor Deposition (PVD) process which was undermining the whole program. Identified proper process conditions which delivered required film stack properties. Transferred the process to Intel site and closed negative float on the extremely aggressive installation and qualification schedule.
• Generated innovative solution to film mechanical properties, which was preventing wafer processing on other toolsets. The solution provided a ~150% improvement from previous baseline and full control of film stress.
• Led a team that solved thin film - lithography - wet etch integration issues related to new material. Developed new diffusion barrier film that assured the device reliability show stopping issue had been resolved and failure rate improved to 98%.
• Demonstrated high volume manufacturing readiness by running at required 85%+ availability at full loadings. With the supplier developed the roadmap of process, hardware and software improvements. Defined process control and manufacturability of the process. Trained 20+ technicians across four shifts to operate the PVD tool and related metrology. Coached technicians to create specifications.
• Developed new pulsed RF sputtering process for oxide materials that eliminated major particle generation mechanism; further improved throughput of the process by 45%.
Staff Thin Films Process Engineer (2000 - 2007)
• Member of the Lean Manufacturing Team implementing the Toyota Production System philosophy into semi-conductor industry utilizing key lean tools such as Kaizen events, waste mapping, st...
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