SENIOR PROCESS & MATERIALS ENGINEER / RESEARCH SCIENTIST
Semiconductor Processing Research & Development (R&D)
Accomplished process engineer and scientist with a versatile history of success contributing to projects and operations of industry-leader Intel Corporation as well as various academic institutions. Combine strong research, analytical, and operational acumen to support attainment of challenging industrial objectives. Work collaboratively with cross-functional teams in the creation and delivery of engineering solutions to optimize the performance of manufacturing platforms. Areas of strength include:
Development / Production Operations:
Semiconductor Process Development │ World-Class Fabrication Metrics │ Model Base Problem Solving
Equipment Engineering │ High Volume Manufacturing R & D │ New Product Releases
Statistical Process Control (SPC) │ Best Known Methods (BKMs) │ Ion Implantation Technology
Process White Papers Pilot │ Statistical Data Analysis / Mining │ Materials Processing
Hands-on Maintenance │ Cost Reductions │ Production Capacity │ Projects Management
Estimated Die Impact (EDI) │ Production Loading Automation │ New Tool Readiness
Materials Processing
Ion Beam Etching │ Hydrogen Thin Film Coating │ Metal / Oxide Thin Film Deposition
High Temp Annealing │ Electron Beam Heating │ Thin Epoxy Bonding │ Cu Film Deposition
X-ray Photoelectron Spectroscopy (XPS) | Secondary Ion Mass Spectrometry (SIMS)
Scanning Electron Microscopy (SEM) │ Energy Dispersive X-ray (EDX) │ Ultra-High Vacuum Instrumentation
Data Management / Computing
Statistical Process Control (SPC) │ SQLPathFinder │ JMP │ LabVIEW │ Microsoft Office
ChrisCAD │ CasaXPS │ Mathematica │ Kaleidagraph │ Igor │ Origin │ Fortran / C++ Programming
ENGINEERING EXPERIENCE
INTEL CORPORATION, Chandler, AZ │ 2006-Present
Process Engineer
Led start-up of Intel 22 nm Class 1 semiconductor manufacturing for ion implantation in Arizona.
o Owner of 22 nm process developments encompassing pilot White Papers experiments, low yield root causes investigation, and process queue time implementation.
o Developed 32 nm process certification packages as well as delivered related training.
o Propelled production by 27% through effective Model Base Problem Solving (MBPS) focused on new wafer automation loading rules.
o Enhanced overall quality of wafers success rate 15% by collaborating with cross module customers on run speed and process optimization efforts.
o Teamed up with defect metrology, device, integration, and materials labs in troubleshooting product contamination from process cascade via SIMS and TXRF investigations.
o Achieved 25% product estimated die impact reduction through restricted tool maintenance cycles, effective defect troubleshooting BKM, and repair of major equipment failure modes.
Owned equipment and process for ion implantation.
o Catapulted production 15% through tool maintenance labors reduction encompassing causes / effects chain and failure mode effects analysis.
o Successfully expanded major maintenance cycle by 33% while reducing costs by $33K per tool annually through re-design of maintenance cycle limiting parts.
o Eliminated mechanical movement defects, shortening maintenance qualification by two hours to achieve a 5% increase in production capacity.
Orchestrated installation and qualification of new tools from vendor delivery testing to Intel manufacturing readiness within statistical process control.
o Cut excursion protection downtime, improving 15% production with creation of new production recipes.
o Delivered 72% test wafer cost saving through enhanced usage, particle, and regen limits.
o Saved over $3.5K per tool annually through re-use and reduction of consumable parts within major maintenance platforms.
Resume Continues…
RESEARCH EXPERIENCE
UNIVERSITY OF VIRGINIA, Charlottesville, VA │ 2003-2006
Research Scientist
Completed materials processing (heating, cooling, ion bombardment) and composition analysis.
Delivered counsel on materials research methodologies to...
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