Hon Yeong

7/19/2015
Irvine, CA

Position Desired

Electronics Engineering
Anywhere in CA
Yes

Resume

SUMMARY

Channel Hardware / Signal Processing:
• Channel SOC validation and integration to Hard Disk Drive System.
• LDPC Read Channel Characterization and Optimization
• Channel Interleaver modeling in Matlab.
• Defect Detection Signal processing feature development.

Patent Awards:
• Authored two patents with Seagate Technologies

Software Skills:
• Matlab Proficient User for the development of test tools and simulation.
• experienced with languages: Python, C, Visual Basic

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EXPERIENCE

Western Digital Senior Staff Engineer, Advanced Channel Integration
2013 – Present

LEAD, CHANNEL DEFECT DETECTION FEATURE DEVELOPMENT:

• Developed signal processing methods to capture defects in heads and media.
• Enhanced Media Defect Detection accuracy with the use of True Data Detection to eliminate noise estimation errors.
• Improved head instability detection by using FIR sample error information to measure DC noise and Gain changes.

LDPC READ CHANNEL SOC INTEGRATION:

• Bring up and Integrate new Read Channel SOC to hard disk system.
• Characterize Channel performance, and tune signal processing blocks.
• Provide firmware teams with specifications on the setup process for channel features.

CHANNEL SIMULATION AND CHARACTERIZATION
• Designed an interleaver model in Matlab to simulate the behavior of future Read Channels. This enabled the team to predict the performance before silicon arrival, and plan design margins.
• Developed an improved transition width TW50 measurement algorithm, which achieves better accuracy in the estimation of channel bit density over asymmetric heads.


Western Digital Staff Engineer, Advanced Channel Optimization
2010 – 2012

LEAD, AREAL DENSITY OPTIMIZATION ALGORITHM DEVELOPMENT:

• Lead the redesign of the Areal Density Algorithm to utilize the Noise Margin Metrics on first generation LDPC channels.

LEAD, CHANNEL DESIGN VERIFICATION TEST:

• Lead the enhancement and redesign of Channel Design Verification Test algorithms to utilize the Noise Margin Metrics for performance measurements on first generation LDPC channels.

• Developed a Fast Multi-track Noise Margin measurement algorithm for LDPC channels, which utilizes prior estimates to reduce measurement test time without compromising accuracy.

• Developed a Fast Multi-Track Off-Track Read Capability measurement algorithm, which utilizes prior estimates to ...

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